1. Field of the Invention
The present invention relates to the field of semiconductor manufacturing technologies, and more particularly to a semiconductor device and manufacturing method thereof.
2. Description of the Related Art
With the continuous development of semiconductor manufacturing techniques, critical dimension of semiconductor devices continue to shrink. As well known by those skilled in the art, gate-last and gate-first approaches are available for manufacturing field effect transistors. In addition, high dielectric constant (also termed as high-K) materials have been more and more applied in semiconductor manufacturing techniques to further reduce device dimensions. Materials having a dielectric constant greater than that of silicon dioxide can be considered high-K materials.
One issue accompanied with the application of high-K materials is an increase in parasitic capacitance, particularly in those situations where side walls are formed using high-K materials.
A method of selectively depositing a high-K dielectric film is disclosed in U.S. Pat. No. 7,670,894, as illustratively shown in FIG. 1 thereof. According to the disclosure of this patent, a resist 101 is treated to obtain a surface with —O—CH3 groups; then a hafnium oxide layer 103 is selectively deposited through atomic layer deposition (ALD) using HfCl4 and water vapor (H2O) as precursors.
However, in this patent, the parasitic capacitance may be increased due to the presence of the sidewalls formed of a high-k material. On the other hand, when covering sidewalls thus formed with a metal, a coverage issue may occur even with ALD. For example, voids may occur in the deposited metal 201, causing short circuits, as shown in FIG. 2, and yield is consequently lowered. The shape of sidewalls is important for the deposition of metal gate material, and therefore, the technique disclosed in this patent needs very sophisticated manufacturing processes.
Thus, there is a need to alleviate or address the above issues. In view of this, a novel and inventive semiconductor device and manufacturing method thereof are proposed for alleviating or eliminating one or more problems in the prior art.